Optimization Methods in High-Level Synthesis

Abstract

Continuous decrease in the transistor technology sizes has enabled much denser packaging of electronic components on chips, which has resulted in integrated circuits with more functionalities and lower costs. However, it has also given rise to new issues and challenges in the integrated circuit design process, including higher vulnerability to soft errors. Modular hardware redundancy is a popular method for improving the reliability of a system against errors at the cost of increasing area and energy consumption. Voltage scaling methods can be employed to tackle high energy costs; however, these approaches also negatively affect a circuit's reliability and performance. Therefore, designing circuits with all these conflicting parameters is a very challenging task. In this study, we employ two optimization approaches: mathematical programming and metaheuristic algorithms for designing integrated circuits with several conflicting parameters. Mathematical programming approaches guarantee the generation of the optimal solutions; however, they are usually highly impractical for complex real-life problems due to their high computational complexity and unrealistically long running times. Nevertheless, the optimal solutions obtained for relatively small problem sizes are useful for testing the performance of other (meta)heuristic methods that solve the same problem in much faster execution times, although without any guarantees about solution optimality.

In this thesis, we propose integer linear programming (ILP)-based and simulated annealing (SA)-based high-level synthesis (HLS) methods to optimize both reliability and energy of the final circuit designs under the area and latency constraints. Our models employ full and partial resource duplication (modular redundancy) to improve the system reliability as long as the area constraint permits. They also utilize voltage islands as the energy reduction method of choice. This problem is even more interesting and complex because our resource library is characterized under multiple supply voltages. We use different versions of the same resources with different area, latency, reliability, and energy values. Although this affects the execution time of the proposed methods, it also gives us more design options. We compared and showed the effectiveness of our methods against a genetic algorithm (GA)-based method on several HLS benchmarks. The ILP-based methods return the optimum results for smaller problem sizes and most of the time for larger problem sizes under the given time limits. In contrast, the SA-based methods outperform the GA-based methods and generate optimal or acceptably near-optimal results for all benchmarks in much faster running times.