Cmos Tabanlı Memristör Okuma Devresi Tasarımı
Özet
Memristor - short form for memory resistor - which was first proposed as the fourth passive circuit element by Dr. Leon Chua in 1971 has taken its place in the academic literature as a theoretical concept. Its first production as a circuit element has been completed in 2008 by HP. The resistance value of the memristor changes depending on the voltage applied across the memristor and its polarity. Memristor can maintain its last state even the power supply is removed. Thus memristor is said to have non-volatile memory. Memristor has the potential to be a crucial component for the new generation memory systems owing to its properties of production in nanometer scale, low power consumption, and nonvolatile memory. In addition to memory systems, it is expected to be widely used in chaotic circuitry due to its nonlinear characteristics and in neuromorphic circuitry due to its electrical properties being similar to synapses.
This study suggests a hardware architecture that can be implemented in electronic systems to process and store data in the form of single and multi-bit. This analog data needs to be converted to digital data by the use of analog-to-digital converter(ADC). ADCs offered in the market serve various purposes, couple of which are measurement and data acquisition. ADCs are classified by the frequency width that they operate in and by their resolution. In this thesis, a delta sigma modulator is used to read data which is stored in the memristor.
Delta sigma ADC is the type of oversampling converters. In oversampling converters, resolution increases as the oversampling ratio (OSR) increases. Quantization noise is pushed up to the higher frequencies during the noise shaping process. Likewise, the modulator output voltage has less noise due to the noise shaping and this causes higher signal-to-noise ratio (SNR) as well as higher accuracy. Delta sigma ADC has two subblocks: modulator and decimator/digital filter blocks. The output of the delta sigma modulator is passed through the low pass filter to filter out the noise at low frequencies of the signal. Output signal frequency of the filter block is downsampled to the input frequency in the decimator block.
Designed readout circuitry for the memristor crossbar array has a unique circuit design with a voltage follower and a monostable multivibrator added to provide the D flip-flop clock signal, one of the sub-blocks of the modulator, unlike the other readout circuitries in the literature. The voltage follower which is used in the design provides isolation between the memristor crossbar array and the delta sigma ADC where the reading process takes place, providing a linear and lossless reading.
The operational amplifier, D flip-flop and 2x1 multiplexer, which are the basic building blocks of the Delta sigma modulator, are designed using TSMC 180 nm CMOS technology. The designed operational amplifier has 65 dB open loop gain, 57o phase margin and 57 MHz unity gain frequency. The designed operational amplifier is used in the design of memristor readout circuitry architecture and the reading process is completed succesfully.
